The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2019

Filed:

Jan. 22, 2018
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Shamim Choudhury, Katy, TX (US);

Zhenyu Yu, Sugar Land, TX (US);

Zhong Ye, Plano, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/42 (2007.01); H02M 7/217 (2006.01); H02M 1/088 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 1/4208 (2013.01); H02M 1/088 (2013.01); H02M 1/4225 (2013.01); H02M 7/217 (2013.01); H02M 2001/009 (2013.01); Y02B 70/126 (2013.01); Y10T 307/406 (2015.04);
Abstract

A multiple-output integrated power factor correction system includes, for example, a processor that is formed in a substrate and is arranged to monitor each voltage output of two or more output stages of a power supply and in response to generate an individual voltage error signal for each monitored output stage. A combined output voltage error signal is generated in response to each of the individual voltage error signals. The voltage input to the power supply and the total inductor current of the power supply are monitored and used to generate a combined output voltage control signal in response to the monitored input voltage total inductor current as well as the combined output voltage error control signal. Each individual output voltage control signal for each monitored output stage is generated in response to each of the respective generated individual voltage error signals.


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