The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2019

Filed:

Jan. 21, 2019
Applicant:

Samsung Display Co., Ltd., Yongin-Si, KR;

Inventors:

Myungchul Kim, Asan-si, KR;

Nam-sik Ko, Yongin-si, KR;

Sedae Ki, Yongin-si, KR;

Moonju Kim, Hwaseong-si, KR;

Sangkueon Lee, Asan-si, KR;

Seunghoon Han, Yongin-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R 12/52 (2011.01); H05K 1/14 (2006.01); H05K 1/11 (2006.01); H05K 1/09 (2006.01); H01L 51/52 (2006.01); G02F 1/1345 (2006.01); H01L 27/32 (2006.01);
U.S. Cl.
CPC ...
H01R 12/52 (2013.01); H05K 1/09 (2013.01); H05K 1/111 (2013.01); H05K 1/147 (2013.01); G02F 1/13452 (2013.01); H01L 27/3276 (2013.01); H01L 51/5237 (2013.01); H01L 2224/05001 (2013.01); H05K 2201/0326 (2013.01); H05K 2201/10128 (2013.01); H05K 2201/10136 (2013.01);
Abstract

A display device including a display panel including a base substrate, a plurality of pixels disposed on the base substrate, and a plurality of panel pad rows that are spaced apart from the pixels in a first direction. Each of the panel pad rows includes a plurality of panel pads arranged in a second direction crossing the first direction in a perpendicular manner, a connecting circuit board disposed on the display panel and connected to the panel pads, and a connection member disposed between the display panel and the connecting circuit board to electrically connect the display panel to the connecting circuit board. A minimum-spaced distance between an edge of the base substrate and the panel pads adjacent thereto may be optimized to improve an adhesion property and an electrical connection reliability between the panel pads and the connecting circuit board.


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