The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2019

Filed:

Jul. 14, 2016
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Rafael Janski, Villach, AT;

Kamil Karlovsky, Villach, AT;

Susanne Kraeuter, London, GB;

Michael Sorger, Villach, AT;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01M 10/42 (2006.01); H01M 4/38 (2006.01); H01L 27/06 (2006.01); H01M 4/66 (2006.01); H01M 10/052 (2010.01); H01M 10/058 (2010.01); H01M 6/40 (2006.01);
U.S. Cl.
CPC ...
H01M 10/425 (2013.01); H01L 27/0688 (2013.01); H01M 4/386 (2013.01); H01M 4/661 (2013.01); H01M 6/40 (2013.01); H01M 10/052 (2013.01); H01M 10/058 (2013.01);
Abstract

A method of manufacturing a battery includes defining an active region and a bonding area in a first main surface of a first semiconductor substrate, forming a first ditch in the bonding area, forming an anode at the first semiconductor substrate in the active region, and forming a cathode at a carrier comprising an insulating material. The method further includes stacking the first semiconductor substrate and the carrier so that the first main surface of the first semiconductor substrate is disposed on a side adjacent to a first main surface of the carrier, a cavity being formed between the first semiconductor substrate and the carrier, and forming an electrolyte in the cavity.


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