The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2019

Filed:

Jan. 23, 2017
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Ordos Yuansheng Optoelectronics Co., Ltd., Ordos, Inner Mongolia, CN;

Inventors:

Tao Yang, Beijing, CN;

Wei Song, Beijing, CN;

Zenghong Li, Beijing, CN;

Peng Chen, Beijing, CN;

Lin Liu, Beijing, CN;

Yonghong Zhang, Beijing, CN;

Ling Tong, Beijing, CN;

Yaorong Liu, Beijing, CN;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 51/56 (2006.01); H01L 27/32 (2006.01); H01L 51/52 (2006.01);
U.S. Cl.
CPC ...
H01L 51/56 (2013.01); H01L 27/32 (2013.01); H01L 51/5237 (2013.01); H01L 51/5246 (2013.01); H01L 2251/566 (2013.01);
Abstract

A method for manufacturing an OLED panel is provided by embodiments of the present disclosure, including following steps of: manufacturing an OLED motherboard which comprises a plurality of OLED panel areas spaced apart from one another, each comprising a display region and a frit package region which is located on a periphery of the display region and is to encapsulate the display region by a frit; and cutting the OLED motherboard along a cutting line to obtain separated OLED panels; and the cutting line is located within the frit package region and at a predetermined distance inwards from an edge of the periphery of the frit package region.


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