IDiyas

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10476016 B1

PDFFull Text
Date of Patent:
Nov. 12, 2019

Filed:

Sep. 21, 2018

Ambipolar synaptic devices

Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Ali Afzali-Ardakani, Ossining, NY (US);

Tze-Chiang Chen, Yorktown Heights, NY (US);

Kailash Gopalakrishnan, San Jose, CA (US);

Bahman Hekmatshoartabari, White Plains, NY (US);

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US);

Attorneys:

L. Jeffrey Kelly

Otterstedt, Wallace & Kammer, LLP

Primary Examiner:

Caridad Everhart

Int. Cl.
CPC ...
H01L 21/28 (2006.01); G06N 3/063 (2006.01); H01L 51/00 (2006.01); G11C 11/54 (2006.01); H01L 29/08 (2006.01); H01L 51/05 (2006.01); H01L 21/8238 (2006.01); H01L 29/165 (2006.01); H01L 29/267 (2006.01); H01L 29/66 (2006.01); H01L 29/778 (2006.01); H01L 29/12 (2006.01); H01L 29/10 (2006.01); H01L 29/06 (2006.01); H01L 29/43 (2006.01); H01L 29/51 (2006.01); H01L 29/423 (2006.01); H01L 29/788 (2006.01);
U.S. Cl.
CPC ...
H01L 51/0566 (2013.01); G06N 3/063 (2013.01); G06N 3/0635 (2013.01); G11C 11/54 (2013.01); H01L 21/8238 (2013.01); H01L 29/0649 (2013.01); H01L 29/0843 (2013.01); H01L 29/0847 (2013.01); H01L 29/1029 (2013.01); H01L 29/1054 (2013.01); H01L 29/122 (2013.01); H01L 29/125 (2013.01); H01L 29/127 (2013.01); H01L 29/165 (2013.01); H01L 29/267 (2013.01); H01L 29/432 (2013.01); H01L 29/51 (2013.01); H01L 29/66431 (2013.01); H01L 29/66462 (2013.01); H01L 29/66477 (2013.01); H01L 29/7783 (2013.01); H01L 29/7786 (2013.01); H01L 51/0541 (2013.01); H01L 51/0545 (2013.01); H01L 51/0562 (2013.01); H01L 21/28273 (2013.01); H01L 29/0665 (2013.01); H01L 29/0673 (2013.01); H01L 29/42324 (2013.01); H01L 29/7788 (2013.01); H01L 29/7881 (2013.01); H01L 51/0055 (2013.01); H01L 2251/301 (2013.01);
Abstract

Device architectures based on trapping and de-trapping holes or electrons and/or recombination of both types of carriers are obtained by carrier trapping either in near-interface deep ambipolar states or in quantum wells/dots, either serving as ambipolar traps in semiconductor layers or in gate dielectric/barrier layers. In either case, the potential barrier for trapping is small and retention is provided by carrier confinement in the deep trap states and/or quantum wells/dots. The device architectures are usable as three terminal or two terminal devices.

Find Patent Forward Citations

Loading…