The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2019

Filed:

Oct. 27, 2017
Applicant:

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Mingfu Han, Beijing, CN;

Xing Yao, Beijing, CN;

Guangliang Shang, Beijing, CN;

Haoliang Zheng, Beijing, CN;

Seung-Woo Han, Beijing, CN;

Jiha Kim, Beijing, CN;

Lijun Yuan, Beijing, CN;

Zhichong Wang, Beijing, CN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 19/00 (2006.01); G09G 3/36 (2006.01); G06F 3/041 (2006.01); G11C 19/28 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3677 (2013.01); G06F 3/0412 (2013.01); G06F 3/0416 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/0291 (2013.01); G09G 2310/08 (2013.01); G09G 2330/021 (2013.01); G09G 2340/0407 (2013.01); G11C 19/28 (2013.01);
Abstract

The present disclosure discloses a gate drive circuit, a display panel and a driving method for the gate drive circuit. The gate drive circuit includes a plurality of shift register units connected in cascade; and further includes: buffer units which are in a one-to-one correspondence with shift register units at all levels, and touch control switch units which are in a one-to-one correspondence with shift register units at even levels. Each buffer unit in the gate drive circuit can increase the holding time of the effective pulse signal output by the shift register unit at a corresponding level by one line before resetting, and the effective pulse signal output by a buffer unit at an even level under the control of a touch control unit and the effective pulse signal output by a buffer unit at an adjacent previous odd level are reset at the same time.


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