The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 12, 2019
Filed:
Sep. 12, 2017
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Sidharth Rastogi, Hwaseong-si, KR;
Subhash Kuchanuri, Hwaseong-si, KR;
Chul-Hong Park, Seongnam-si, KR;
Jae-Seok Yang, Hwaseong-si, KR;
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-do, KR;
Abstract
A method of designing a layout of a semiconductor device includes designing layouts of cells, each layout including first conductive lines, the first conductive lines extending in a first direction and being spaced apart from each other in a second direction crossing the first direction, disposing the layouts of the cells to be adjacent to each other in the first direction, such that the first conductive lines in adjacent layouts of the cells are connected to each other, and disposing insulation blocks at a boundary area between adjacent ones of the layouts of the cells or in areas of the layouts of the cells adjacent to the boundary area, such that the insulation blocks block connections between some of the first conductive lines.