The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2019

Filed:

Dec. 21, 2017
Applicant:

Sifotonics Technologies Co., Ltd., Grand Cayman, KY;

Inventors:

Mengyuan Huang, Beijing, CN;

Tzung-I Su, Taoyuan, TW;

Su Li, Beijing, CN;

Naichuan Zhang, Beijing, CN;

Pengfei Cai, Beijing, CN;

Wang Chen, Beijing, CN;

Ching-yin Hong, Lexington, MA (US);

Dong Pan, Andover, MA (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02B 6/12 (2006.01); G02B 6/122 (2006.01); H01L 31/107 (2006.01); H01L 27/144 (2006.01); H01L 31/02 (2006.01); G02B 6/136 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
G02B 6/122 (2013.01); G02B 6/12004 (2013.01); G02B 6/136 (2013.01); H01L 27/1443 (2013.01); H01L 31/02005 (2013.01); H01L 31/02027 (2013.01); H01L 31/1075 (2013.01); G02B 2006/12061 (2013.01); G02B 2006/12123 (2013.01); H01L 28/24 (2013.01); H01L 28/40 (2013.01);
Abstract

Various embodiments of a fully integrated avalanche photodiode receiver and manufacturing method thereof are described herein. A photonic device includes a silicon-on-insulator (SOI) substrate with a buried oxide (BOX) layer therein, an avalanche photodiode integrated with the SOI substrate, a capacitor integrated with the SOI substrate, a resistor integrated with the SOI substrate, and silicon passive waveguides as well as bonding pads integrated with the SOI substrate.


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