The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 05, 2019
Filed:
Jan. 23, 2019
Applicant:
Hong Kong Applied Science and Technology Research Institute Company Limited, Hong Kong, CN;
Inventors:
Hang Sang Lee, Hong Kong, CN;
Yan Liu, Hong Kong, CN;
Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 1/32 (2007.01); H02M 1/38 (2007.01); G01K 7/34 (2006.01); H02M 7/5387 (2007.01);
U.S. Cl.
CPC ...
H02M 1/32 (2013.01); G01K 7/34 (2013.01); H02M 1/38 (2013.01); H02M 7/53871 (2013.01); H02M 2001/385 (2013.01);
Abstract
A method that prevents overload to input source and reduces parasitic inductance in an inverter circuit with dead-time control. A sensing capacitor senses temperatures of transistors in the inverter circuit. A delay generator changes delay times in response to receiving the temperatures of the transistors from the sensing capacitor. A dead time generation unit changes the dead times for the transistors in response to changes in the delay times.
Lee, Hang. (2019). Method and apparatus of dead time tuning in an inverter (U.S. Patent No. 10468974). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10468974
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile