The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 05, 2019

Filed:

Jul. 01, 2016
Applicant:

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Cheng Peng, Beijing, CN;

Ying Chen, Beijing, CN;

Shuyi Liu, Beijing, CN;

Franky So, Beijing, CN;

Kirk S. Schanze, Beijing, CN;

Rajendra Acharya, Beijing, CN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 51/50 (2006.01); H01L 51/56 (2006.01); H01L 51/00 (2006.01); H01L 51/52 (2006.01);
U.S. Cl.
CPC ...
H01L 51/5012 (2013.01); H01L 51/0059 (2013.01); H01L 51/0081 (2013.01); H01L 51/0082 (2013.01); H01L 51/5056 (2013.01); H01L 51/5072 (2013.01); H01L 51/5092 (2013.01); H01L 51/5262 (2013.01); H01L 51/5268 (2013.01); H01L 51/56 (2013.01); H01L 51/0026 (2013.01);
Abstract

An organic light-emitting diode and a preparation method thereof, a display substrate, and a display device. The organic light-emitting diode includes a double-layer fold structure, the double-layer fold structure includes a first layer and a second layer adjacent to each other, an interface between the first layer and the second layer and a surface of the second layer farther away from the first layer have a fold morphology, a virtrification transition temperature of the first layer is less than a virtrification transition temperature of the second layer, and a thermal expansion coefficient of the first layer is greater than a thermal expansion coefficient of the second layer. In the organic light-emitting diode, a natural and self-assembled fold morphology can be obtained with a double-layer thin film, to replace an external fold structure, and the resulted device has a higher efficiency and a reduced operating voltage.


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