The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 05, 2019

Filed:

Dec. 22, 2016
Applicant:

Sony Corporation, Tokyo, JP;

Inventors:

Katsuhiko Fukasaku, Kanagawa, JP;

Daisuke Nakagawa, Kanagawa, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 21/822 (2006.01); H01L 27/04 (2006.01); H01L 23/60 (2006.01); H01L 27/07 (2006.01); H01L 27/06 (2006.01); H03K 19/003 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0274 (2013.01); H01L 21/822 (2013.01); H01L 23/60 (2013.01); H01L 27/0277 (2013.01); H01L 27/0285 (2013.01); H01L 27/04 (2013.01); H01L 27/0629 (2013.01); H01L 27/0705 (2013.01); H03K 19/00361 (2013.01);
Abstract

The present technology relates to a semiconductor integrated circuit which operates with a low voltage and is capable of preventing destruction of a protection circuit and a control method thereof. The semiconductor integrated circuit includes a resistance element and a capacitance element connected between a power supply line and a ground line in series, an inverter of which an input is connected between the resistance element and the capacitance element, a MOS transistor of which a gate electrode is connected to an output of the inverter and a drain electrode and a source electrode are respectively connected to the power supply line and the ground line, and a current limit element inserted between a well region where the MOS transistor is formed and the gate electrode. The present technology is applied to, for example, the protection circuit for preventing destruction of an internal circuit by ESD and the like.


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