The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 05, 2019

Filed:

Nov. 09, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Jongchan Shin, Seongnam-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Samsung-ro, Yeongton-gu, Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/033 (2006.01); H01L 21/311 (2006.01); H01L 21/3105 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0337 (2013.01); H01L 21/0332 (2013.01); H01L 21/31053 (2013.01); H01L 21/31144 (2013.01); H01L 23/528 (2013.01);
Abstract

Disclosed are semiconductor devices and methods of manufacturing the same. The method comprises sequentially forming a target layer and a first mask layer on a substrate, patterning the first mask layer to form a first opening in the first mask layer, forming a spacer covering an inner wall of the first opening, forming on the first mask layer a first photoresist pattern having a second opening vertically overlapping at least a portion of the spacer, forming a third opening in the first mask layer that is adjacent to the first opening by using the spacer as a mask to remove a portion of the first mask layer that is exposed to the second opening, and using the first mask layer and the spacer as a mask to pattern the target layer.


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