The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 05, 2019
Filed:
Feb. 07, 2018
Applicant:
Toshiba Memory Corporation, Minato-ku, Tokyo, JP;
Inventor:
Hayao Kasai, Tokyo, JP;
Assignee:
TOSHIBA MEMORY CORPORATION, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 16/04 (2006.01); G11C 11/4094 (2006.01); G11C 16/34 (2006.01); G11C 11/56 (2006.01); G11C 16/10 (2006.01); G11C 29/26 (2006.01); G11C 29/52 (2006.01); G11C 7/12 (2006.01); G11C 16/32 (2006.01); G11C 29/12 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4094 (2013.01); G11C 11/5628 (2013.01); G11C 11/5635 (2013.01); G11C 16/0475 (2013.01); G11C 16/10 (2013.01); G11C 16/3445 (2013.01); G11C 16/3459 (2013.01); G11C 29/26 (2013.01); G11C 29/52 (2013.01); G11C 7/12 (2013.01); G11C 16/0483 (2013.01); G11C 16/32 (2013.01); G11C 2029/1204 (2013.01); G11C 2029/2602 (2013.01); G11C 2211/5624 (2013.01); G11C 2211/5641 (2013.01); G11C 2216/22 (2013.01);
Abstract
According to one embodiment, a semiconductor memory device comprises a first memory cell array including a first block and a second block, the first block including a first memory cell, and the second block including a second memory cell; and a controller that performs, in a first period of time in writing, a first program in the first memory cell and the second memory cell.