The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2019

Filed:

Jun. 18, 2018
Applicant:

Inphi Corporation, Santa Clara, CA (US);

Inventors:

Benjamin Smith, Ottawa, CA;

Arash Farhoodfar, Santa Clara, CA (US);

Stewart Crozier, Boulder, CO (US);

Frank R. Kschischang, Mississauga, CA;

Andrew Hunt, Ottawa, CA;

Assignee:

INPHI CORPORATION, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/34 (2006.01); H03M 13/29 (2006.01); H04L 1/00 (2006.01); H04L 25/49 (2006.01); H04L 27/04 (2006.01); H03M 13/15 (2006.01);
U.S. Cl.
CPC ...
H03M 13/2906 (2013.01); H03M 13/1515 (2013.01); H04L 1/006 (2013.01); H04L 1/0041 (2013.01); H04L 1/0042 (2013.01); H04L 1/0045 (2013.01); H04L 1/0057 (2013.01); H04L 1/0063 (2013.01); H04L 1/0065 (2013.01); H04L 25/4917 (2013.01); H04L 27/04 (2013.01);
Abstract

For some applications such as high-speed communication over short-reach links, the complexity and associated high latency provided by existing modulators may be unsuitable. According to an aspect, the present disclosure provides a modulator that can reduce latency for applications such as 40 G/100 G communication over copper cables or SMF. The modulator has a symbol mapper for mapping a bit stream into symbols, and a multi-level encoder including an inner encoder and an outer encoder for encoding only a portion of the bit stream. In some implementations, the multi-level encoder is configured such that an information block size of the inner encoder is small and matches a field size of the outer encoder. Therefore, components that would be used to accommodate larger block sizes can be omitted. The effect is that complexity and latency can be reduced. According to another aspect, the present disclosure provides a demodulator that is complementary to the modulator.


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