The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2019

Filed:

Jan. 27, 2017
Applicant:

Sony Corporation, Tokyo, JP;

Inventors:

Yasuo Kanda, Kanagawa, JP;

Yuji Torige, Kanagawa, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 14/00 (2006.01); G11C 11/15 (2006.01); G11C 11/41 (2006.01); G11C 11/412 (2006.01); H01L 27/105 (2006.01); H01L 27/11 (2006.01);
U.S. Cl.
CPC ...
G11C 14/0081 (2013.01); G11C 11/15 (2013.01); G11C 11/41 (2013.01); G11C 11/412 (2013.01); H01L 27/105 (2013.01); H01L 27/11 (2013.01);
Abstract

A semiconductor circuit in the disclosure includes a first circuit that is able to generate, on the basis of a voltage in a first node, an inverted voltage of the voltage and to apply the inverted voltage to a second node; a second circuit that is able to generate, on the basis of a voltage in the second node, an inverted voltage of the voltage and to apply the inverted voltage to the first node; a first transistor that couples the first node to a third node; a second transistor that supplies a first direct-current voltage to the third node; a third transistor including a drain or a source to be coupled to the third node and including a gate coupled to the first node or the second node; and a first storage element that is coupled to the third node, and is able to take a first resistance state or a second resistance state. The first circuit and the second circuit are configured to cause the voltage in the first node to easily become a predetermined initial voltage after application of power.


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