The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2019

Filed:

Oct. 22, 2018
Applicant:

SK Hynix Inc., Incheon-si, KR;

Inventors:

Kyung Wan Kim, Icheon-si, KR;

Tae Jung Ha, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
G11C 13/004 (2013.01); G11C 13/003 (2013.01); H01L 27/2463 (2013.01); G11C 2013/0045 (2013.01); G11C 2013/0054 (2013.01);
Abstract

In a method of reading a resistive memory device according to an embodiment, a memory cell including a selection element and a variable resistance element is prepared. The selection element exhibits a snap-back behavior on a current-voltage sweep curve for the memory cell. First and second read voltages to be applied to the memory cell are determined within a voltage range in which the selection element maintains a turned-on state. The magnitude of the second read voltage is less than that of the first read voltage and selected in a voltage range in which the selection element exhibits the snap-back behavior. The first read voltage is applied to the memory cell to measure a first cell current. The second read voltage is applied to the memory cell to measure a second cell current. A resistance state stored in the memory cell is determined based on the first cell current and the second cell current.


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