The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2019

Filed:

Jul. 01, 2015
Applicant:

Google Inc., Mountain View, CA (US);

Inventors:

Monish Shah, Dublin, CA (US);

Albert Thomas Borchers, Aptos, CA (US);

Joel Dylan Coburn, Sunnyvale, CA (US);

Benjamin Charles Serebrin, Sunnyvale, CA (US);

Assignee:

GOOGLE LLC, Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/36 (2006.01); G06F 12/1081 (2016.01); G06F 12/02 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
G06F 12/1081 (2013.01); G06F 12/0246 (2013.01); G11C 7/1072 (2013.01); G06F 2212/2532 (2013.01); G06F 2212/7202 (2013.01);
Abstract

A method includes deploying non-volatile random access memory (NVRAM) coupled to a processor or central processing unit (CPU) core of a computing device as a peripheral device via an input/output (I/O) bus, and providing a NVRAM application programming interface (API) for the CPU core to conduct NVRAM read and write operations. Providing the NVRAM API includes allocating a single memory buffer per command to hold data transferred to or from the NVRAM. The method includes configuring the processor in conjunction with the NVRAM API to set up command queues inside in the host Memory Mapped Input Output (MMIO) space.


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