The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 29, 2019
Filed:
Jan. 08, 2018
Seagate Technology Llc, Cupertino, CA (US);
Paras Gangwal, Maharashtra, IN;
Komal Shah, Mumbai, IN;
Surbhi Bansal, Pune, IN;
Sachin Bastimane, Pune, IN;
SEAGATE TECHNOLOGY LLC, Cupertino, CA (US);
Abstract
An on-chip clock (OCC) circuit of an integrated circuit includes a clock generator, an OCC controller, and an OCC observation circuit. The clock generator is configured to generate a plurality of clock signals. The OCC controller is configured to receive the clock signals and generate an OCC output for use by the scan chains of logic blocks. The OCC observation circuit is configured to generate a status output on a status output port based on the OCC output during an at-speed capture phase and a scan enable signal. Patterns of the status output with respect to the scan enable signal include a valid pattern indicating that the OCC output includes a valid number of at-speed capture pulses, a first invalid pattern indicating a first error in the OCC output, and a second invalid pattern indicating a second error in the OCC output that is different from the first error.