The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2019

Filed:

Jun. 26, 2018
Applicant:

Fuji Electric Co., Ltd., Kawasaki-shi, Kanagawa, JP;

Inventors:

Takeshi Tawara, Tsukuba, JP;

Hidekazu Tsuchida, Yokosuka, JP;

Tetsuya Miyazawa, Yokosuka, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kawasaki-Shi, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/16 (2006.01); C30B 29/36 (2006.01); C30B 25/18 (2006.01); C30B 25/20 (2006.01); H01L 21/02 (2006.01); H01L 21/04 (2006.01); H01L 29/36 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1608 (2013.01); C30B 25/183 (2013.01); C30B 25/20 (2013.01); C30B 29/36 (2013.01); H01L 21/02447 (2013.01); H01L 21/02494 (2013.01); H01L 21/02634 (2013.01); H01L 21/0465 (2013.01); H01L 29/36 (2013.01); H01L 21/02378 (2013.01); H01L 21/02529 (2013.01); H01L 21/02576 (2013.01);
Abstract

A silicon carbide semiconductor substrate, including a silicon carbide substrate of a first conductivity type, a buffer layer of the first conductivity type and an epitaxial layer of the first conductivity type. The silicon carbide substrate has a central part and a peripheral part surrounding the central part, and is doped with a first impurity that determines the first conductivity type. The buffer layer is provided on a front surface of the central part of the silicon carbide substrate, and is doped with the first impurity, of which a concentration is at least 1.0×10/cm, and a second impurity different from the first impurity. The epitaxial layer is provided on a front surface of the peripheral part of the silicon carbide substrate, and is doped with the first impurity, of which a concentration is lower than the concentration of the first impurity in the buffer layer.


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