The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2019

Filed:

Sep. 16, 2016
Applicant:

National University Corporation Shizuoka University, Shizuoka-shi, Shizuoka, JP;

Inventors:

Shoji Kawahito, Shizuoka, JP;

Min-Woong Seo, Shizuoka, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H04N 5/357 (2011.01); H04N 5/369 (2011.01); H04N 5/374 (2011.01); H04N 5/361 (2011.01); H04N 5/363 (2011.01);
U.S. Cl.
CPC ...
H01L 27/14612 (2013.01); H01L 27/1461 (2013.01); H04N 5/357 (2013.01); H04N 5/361 (2013.01); H04N 5/369 (2013.01); H04N 5/374 (2013.01); H04N 5/3742 (2013.01); H04N 5/3575 (2013.01); H04N 5/363 (2013.01);
Abstract

A semiconductor element includes a semiconductor region () of a first conductivity type, a buried charge-generation region () of a second conductivity type, buried in an upper portion of the semiconductor region () to implement a photodiode (D) together with the semiconductor region () to generate charges, a charge-readout region () of the second conductivity type, provided in the semiconductor region () to accumulate the charges transferred from the buried charge-generation region (), and a reset-performing region () of the second conductivity type, provided in the semiconductor region (), a variable voltage is applied to the reset-performing region () to change the height of a potential barrier generated in the semiconductor region () sandwiched between the charge-readout region () and the reset-performing region () to exhaust the charges accumulated in the charge-readout region (). The semiconductor element has a high pixel conversion gain, ultralow noise of a photon counting level and implements a solid-state imaging device.


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