The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2019

Filed:

Aug. 04, 2017
Applicant:

Huawei Technologies Co., Ltd., Shenzhen, Guangdong, CN;

Inventors:

Antonios Iliopoulos, Munich, DE;

Shay Goikhman, Hod Hasharon, IL;

Eliezer Levy, Hod Hasharon, IL;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01); G06F 16/28 (2019.01); G06F 16/27 (2019.01); G06F 16/23 (2019.01); G06F 12/1027 (2016.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 16/283 (2019.01); G06F 12/1027 (2013.01); G06F 16/2315 (2019.01); G06F 16/27 (2019.01); G06F 12/0284 (2013.01); G06F 2212/682 (2013.01);
Abstract

A system for memory synchronization of a multi-core system is provided, the system comprising: an assigning module which is configured to assign at least one memory partition to at least one core of the multi-core system; a mapping module which is configured to provide information for translation lookaside buffer shootdown for the multi-core system leveraged by sending an interrupt to the at least one core of the multi-core system, if a page table entry associated with the memory partition assigned to the at least one core is modified; and an interface module which is configured to provide an interface to the assigning module from user-space.


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