The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 22, 2019
Filed:
Sep. 28, 2017
Applicant:
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Inventors:
David A. Roberts, Boxborough, MA (US);
Elliot H. Mednick, Boxborough, MA (US);
Assignee:
Advanced Micro Devices, Inc., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0804 (2016.01); G06F 12/0811 (2016.01); G06F 12/0831 (2016.01); G06F 12/084 (2016.01); G06F 12/0891 (2016.01); G06F 12/126 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0831 (2013.01); G06F 12/0804 (2013.01); G06F 12/0811 (2013.01); G06F 12/0891 (2013.01); G06F 12/126 (2013.01); G06F 12/084 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/1044 (2013.01); G06F 2212/283 (2013.01); G06F 2212/452 (2013.01); G06F 2212/507 (2013.01); G06F 2212/60 (2013.01); G06F 2212/621 (2013.01);
Abstract
A method of preemptive cache writeback includes transmitting, from a first cache controller of a first cache to a second cache controller of a second cache, an unused bandwidth message representing an unused bandwidth between the first cache and the second cache during a first cycle. During a second cycle, a cache line containing dirty data is preemptively written back from the second cache to the first cache based on the unused bandwidth message. Further, the cache line in the second cache is written over in response to a cache miss to the second cache.