The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 15, 2019

Filed:

Aug. 23, 2018
Applicant:

Credo Technology Group Limited, Grand Cayman, KY;

Inventors:

Fang Cai, Milpitas, CA (US);

Junqing Sun, Fremont, CA (US);

Haoli Qian, Fremont, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/03 (2006.01); H04B 14/02 (2006.01); H04L 27/01 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03057 (2013.01); H04B 14/023 (2013.01); H04L 27/01 (2013.01);
Abstract

Precompensator-based quantization techniques offer a way to reduce the complexity and power requirements of clock recovery modules while offering improved timing recovery performance relative to a bang-bang scheme operating in a lossy channel. One illustrative method embodiment includes: (a) obtaining a receive signal having a sequence of symbols from a symbol set, the receive signal exhibiting trailing intersymbol interference; (b) operating on the receive signal with a precompensation unit having a set of comparators to produce, for each sampling instant, a set of comparator results representing a quantized receive signal value, the set of comparators applying a set of threshold values that at least partly compensate for the trailing intersymbol interference; (c) deriving a symbol decision from each set of comparator results; (d) combining the symbol decisions with said quantized receive signal values to determine an estimated timing error for each sampling instant; and (e) filtering the estimated timing errors to generate a sampling clock.


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