The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 15, 2019

Filed:

Dec. 02, 2015
Applicant:

Telefonaktiebolaget Lm Ericsson (Publ), Stockholm, SE;

Inventor:

Reza Bagger, Järfälla, SE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/356 (2006.01); H03K 3/3562 (2006.01); H03K 21/10 (2006.01); H03K 23/42 (2006.01); H03K 19/20 (2006.01); H04B 1/40 (2015.01); H03K 5/15 (2006.01); H03K 3/37 (2006.01); H03K 23/48 (2006.01);
U.S. Cl.
CPC ...
H03K 3/356104 (2013.01); H03K 3/356 (2013.01); H03K 3/35625 (2013.01); H03K 3/356139 (2013.01); H03K 3/37 (2013.01); H03K 5/15066 (2013.01); H03K 19/20 (2013.01); H03K 21/10 (2013.01); H03K 23/425 (2013.01); H04B 1/40 (2013.01); H03K 23/483 (2013.01);
Abstract

An electronic latch circuit, a 4-phase signal generator, a multi-stage frequency divider and a poly-phase signal generator are disclosed. The electronic latch circuit comprises an output circuit comprising a first output and a second output. The electronic latch circuit further comprises an input circuit comprising a first input, a second input and a clock signal input. The electronic latch circuit is configured to change state based on the input signals' level at the inputs of the input circuit and a present state of the output circuit. The 4-phase signal generator is built with two electronic latch circuits. The multi-stage frequency dividers and poly-phase signal generators comprise a plurality of the electronic latch circuits and 4-phase signal generators.


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