The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 15, 2019

Filed:

Apr. 03, 2019
Applicant:

Qorvo Us, Inc., Greensboro, NC (US);

Inventors:

Alexander Wayne Hietala, Phoenix, AZ (US);

Nadim Khlat, Cugnaux, FR;

Michael F. Zybura, Scotts Valley, CA (US);

Assignee:

Qorvo US, Inc., Greensboro, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/52 (2006.01); H03F 3/19 (2006.01); H03F 3/24 (2006.01); H04B 1/04 (2006.01); H01Q 21/06 (2006.01);
U.S. Cl.
CPC ...
H03F 1/52 (2013.01); H01Q 21/061 (2013.01); H03F 3/19 (2013.01); H03F 3/245 (2013.01); H04B 1/04 (2013.01); H03F 2200/129 (2013.01); H03F 2200/426 (2013.01); H03F 2200/451 (2013.01); H03F 2200/462 (2013.01); H03F 2200/471 (2013.01);
Abstract

A phased array antenna system having a plurality of antenna elements arranged into an array is disclosed. Each of a plurality of amplifier circuitries has an output terminal coupled to a corresponding one of the plurality of antenna elements and includes a power amplifier having a control terminal coupled to an input terminal. The power amplifier has a first current terminal coupled to the output terminal and a second current terminal coupled to a fixed voltage node. Further included in each of the plurality of amplifier circuitries is a current limiter having a bias terminal coupled to the control terminal of the power amplifier to adjust a bias point of the power amplifier to limit current flowing through the first current terminal and the second current terminal to within a predetermined current range. Some embodiments also include a voltage limiter to limit voltage amplitude at the output terminal.


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