The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 15, 2019

Filed:

Sep. 20, 2018
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Yueh Chun Cheng, Cupertino, CA (US);

Hung-Min Cheng, Saratoga, CA (US);

Chien-Chih Lin, San Jose, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/575 (2006.01); H03F 3/45 (2006.01);
U.S. Cl.
CPC ...
G05F 1/575 (2013.01); H03F 3/45179 (2013.01);
Abstract

Regulation/Bypass automation for a low drop-out regulator (LDO) with multiple supply voltages is disclosed. In some implementations, a LDO includes a resistor, a pass transistor having a source, a gate, and a drain to output a voltage Vout, the source coupled to a supply voltage, the gate coupled to an output of an operational transconductance amplifier (OTA), and the drain coupled to a first terminal of the resistor; a feedback switch having a drain, a gate, and a source, the drain coupled to a second terminal of the resistor, the source coupled to a negative input of the OTA; and an pull-down transistor having a drain, a gate, and a source, the source coupled to ground, and the drain coupled to the negative input of the OTA, wherein the gate of the pull-down transistor and the gate of the feedback switch are configured to receive a bypass signal.


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