The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 08, 2019

Filed:

Jun. 12, 2018
Applicant:

Fsp Technology Inc., Taoyuan, TW;

Inventor:

Kuo-Fan Lin, Taoyuan, TW;

Assignee:

FSP TECHNOLOGY INC., Taoyuan, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 1/42 (2007.01); H02M 7/219 (2006.01); H02M 7/5387 (2007.01); H02M 3/158 (2006.01); H03K 17/06 (2006.01); H03K 17/0812 (2006.01); H03K 17/30 (2006.01);
U.S. Cl.
CPC ...
H02M 1/4233 (2013.01); H02M 3/1588 (2013.01); H02M 7/219 (2013.01); H02M 7/5387 (2013.01); H03K 17/063 (2013.01); H03K 17/08122 (2013.01); H02M 2007/2195 (2013.01); H03K 2017/307 (2013.01);
Abstract

A rectifier, including: a first and a second input terminal, a first output terminal and at least one rectifying circuit. Each rectifying circuit including: a switching circuit including a transistor, and a driving circuit. The driving circuit is coupled to the switching circuit and controls a switching status of the switching circuit, and includes a totem-pole circuit and an input transistor. The totem-pole circuit includes an input terminal and an output terminal coupled to the transistor. The input transistor is coupled between the totem-pole circuit and the switching circuit. The at least one rectifying circuit includes a first and a second rectifying circuit. The transistors of the first rectifying circuit and the second rectifying circuit are coupled to the first output terminal. The input transistors of the first rectifying circuit and the second rectifying circuit are coupled to the first input terminal and the second input terminal, respectively.


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