The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10439071 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 08, 2019

Filed:

Jun. 15, 2017
Applicant:

Shenzhen China Star Optoelectronics Technology Co., Ltd., Shenzhen, Guangdong, CN;

Inventor:

Ziran Li, Guangdong, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/14 (2006.01); H01L 29/04 (2006.01); H01L 29/15 (2006.01); H01L 31/036 (2006.01); H01L 29/786 (2006.01); H01L 29/66 (2006.01); H01L 27/12 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7869 (2013.01); H01L 27/1225 (2013.01); H01L 27/1262 (2013.01); H01L 29/4908 (2013.01); H01L 29/66742 (2013.01); H01L 29/66969 (2013.01); H01L 29/78606 (2013.01);
Abstract

The present disclosure relates to a TFT including a gate on a substrate; a gate insulation layer on the substrate and the gate, and a surface of the gate insulation layer being applied with a flattening process; an oxygen-rich layer on the gate insulation layer; an active layer on the oxygen-rich layer; a source and a drain on the active layer; and a passivation layer on the active layer, the source, and the drain. In addition, the present disclosure also relates to a manufacturing method of the TFTs and the array substrate having the TFTs. By applying the flattening process to the surface of the gate insulation layer and by forming the oxygen-rich layer on the gate insulation layer, the surface of the gate insulation layer is smooth so as to eliminate the oxygen vacancy defects on the surface of the gate insulation layer. Thus, the surface state of the gate insulation layer is stable.


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Li, Ziran. (2019). Thin film transistors and the manufacturing methods thereof, and array substrates (U.S. Patent No. 10439071). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10439071

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