The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 08, 2019

Filed:

Jan. 13, 2015
Applicant:

Mitsubishi Electric Corporation, Tokyo, JP;

Inventors:

Kazuhiro Nishimura, Fukuoka, JP;

Makoto Ueno, Fukuoka, JP;

Masataka Mametuka, Fukuoka, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/06 (2006.01); H01L 29/739 (2006.01); H01L 29/74 (2006.01); H01L 21/8222 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 27/07 (2006.01); H01L 23/52 (2006.01); H01L 27/092 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0647 (2013.01); H01L 21/8222 (2013.01); H01L 23/52 (2013.01); H01L 27/0623 (2013.01); H01L 27/0705 (2013.01); H01L 29/0646 (2013.01); H01L 29/66325 (2013.01); H01L 29/739 (2013.01); H01L 29/7393 (2013.01); H01L 29/74 (2013.01); H01L 29/7404 (2013.01); H01L 27/0727 (2013.01); H01L 27/0922 (2013.01);
Abstract

A semiconductor device of the present invention achieves improved avoidance of a parasitic operation in a circuit region while achieving miniaturization of the semiconductor device and a reduction in the amount of time for manufacturing the semiconductor device. The semiconductor device according to the present invention includes an IGBT disposed on a first main surface of a semiconductor substrate provided with a drift layer of a first conductivity type; a thyristor disposed on the first main surface of the semiconductor substrate; a circuit region; a hole-current retrieval region separating the IGBT and the circuit region in a plan view; and a diffusion layer of a second conductivity type, the diffusion layer being disposed on a second main surface of the semiconductor substrate. The IGBT has an effective area equal to or less than an effective area of the thyristor in a plan view.


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