The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 08, 2019
Filed:
Jul. 08, 2015
Applicant:
Sii Semiconductor Corporation, Chiba-shi, Chiba, JP;
Inventor:
Tomomitsu Risaki, Chiba, JP;
Assignee:
ABLIC Inc., , JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 27/088 (2006.01); H01L 23/528 (2006.01); H01L 23/482 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0274 (2013.01); H01L 23/4824 (2013.01); H01L 23/528 (2013.01); H01L 27/0207 (2013.01); H01L 27/0277 (2013.01); H01L 27/088 (2013.01);
Abstract
When an ESD element is operated, for the purpose of suppressing heat generation and causing uniform current to flow through all channels of all transistors included in the ESD element, various substrate potentials existing in the transistors and the channels of a multi finger type ESD element are electrically connected via a low resistance substrate, and further, are set to a potential that is different from a Vss potential. In this manner, the current is uniformized and heat generation is suppressed through low voltage operation to improve an ESD tolerance.