The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 08, 2019

Filed:

Mar. 05, 2018
Applicant:

Murata Manufacturing Co., Ltd., Nagaokakyo-shi, Kyoto-fu, JP;

Inventors:

Tetsuo Kawakami, Nagaokakyo, JP;

Takahiro Hirao, Nagaokakyo, JP;

Tsutomu Tanaka, Nagaokakyo, JP;

Tomohiro Kageyama, Nagaokakyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 4/232 (2006.01); H01G 4/012 (2006.01); H01G 4/30 (2006.01); H01G 4/008 (2006.01); H01G 4/242 (2006.01);
U.S. Cl.
CPC ...
H01G 4/2325 (2013.01); H01G 4/008 (2013.01); H01G 4/012 (2013.01); H01G 4/232 (2013.01); H01G 4/30 (2013.01); H01G 4/242 (2013.01);
Abstract

A multilayer electronic component includes first, second, and third ceramic layers, first and second inner electrodes, and a via-electrode. The first, second and third ceramic layers are sequentially stacked on each other. The first inner electrode is sandwiched between the first and second ceramic layers. The second inner electrode is sandwiched between the second and third ceramic layers. The via-electrode electrically connects the first and second inner electrodes. A projection is integrally provided with the via-electrode. The projection projects from the via-electrode towards an outer peripheral direction and is inserted into the second ceramic layer in a layered arrangement.


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