The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 08, 2019

Filed:

Feb. 28, 2018
Applicant:

Sandisk Technologies Llc, Plano, TX (US);

Inventors:

Ward Parkinson, Boise, ID (US);

Thomas Michael Trent, Tucson, AZ (US);

James Edwin O'Toole, Boise, ID (US);

Assignee:

SanDisk Technologies LLC, Plano, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0009 (2013.01); G11C 13/004 (2013.01); G11C 13/0069 (2013.01);
Abstract

In a memory system, variable resistance circuits, such as transistor circuits, in the word line and bit line decoders are set during bias line set times and/or prior to turn-on times of read operations to increased resistance levels. The variable resistance circuits are kept at the increased resistance levels during an initial turn-on time period during which a selected memory cell may conducts a current spike. The increased resistance levels of the variable resistance circuit may operate to reduce or limit the width of the current spike. In response to the initial turn-on time period ending, the variable resistance circuits are set back to low resistance levels to facilitate subsequent sense results detection events and program operations.


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