The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 08, 2019
Filed:
Jun. 21, 2018
General Electric Company, Schenectady, NY (US);
Panagiotis Manolios, Sharon, MA (US);
Meng Li, Niskayuna, NY (US);
Italo Romani De Oliveira, Sao Jose dos Campos, BR;
Augusto Marasca De Conto, Rio de Janeiro, BR;
Han Yu, Niskayuna, NY (US);
Daniel Russell, Grand Rapids, MI (US);
Sundeep Roy, Pinellas Park, FL (US);
General Electric Company, Schenectady, NY (US);
Abstract
A system for equivalence class analysis-based automated requirements-based test case generation includes a control processor, a data store containing textual design requirements, a textual converter unit structured to convert the textual design requirements to a machine-readable version of design requirements, a requirement partition unit configured to partition the machine-readable design requirements into one or more sets of related design requirements, an equivalence class partition unit configured to process the machine-readable design requirements and input/output variables into a set of equivalence classes, an equivalence class analyzer unit structured to analyze the set of equivalence classes to generate equivalence class tests and identify uncovered input space, and a boundary class analyzer unit structured to identify boundaries of the equivalence classes and generate boundary value tests and robustness tests. A method for equivalence class analysis-based automated requirements-based test case generation implementable on the system, and a non-transitory computer readable medium are also disclosed.