The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 08, 2019

Filed:

Jun. 21, 2016
Applicant:

Sandisk Technologies Llc, Plano, TX (US);

Inventors:

Ekram Bhuiyan, San Jose, CA (US);

Steve Chi, Cupertino, CA (US);

Assignee:

SanDisk Technologies LLC, Plano, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01); G11C 7/22 (2006.01); G11C 13/00 (2006.01); G11C 16/32 (2006.01); G11C 29/02 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0605 (2013.01); G06F 3/0634 (2013.01); G06F 3/0653 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G11C 7/222 (2013.01); G11C 13/0061 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 16/32 (2013.01); G11C 29/023 (2013.01); G11C 29/028 (2013.01);
Abstract

A storage system and method for dynamic duty cycle correction are disclosed. In one embodiment, a controller of a storage system provides a clock signal to the memory, receives the clock signal back from the memory, monitors the duty cycle of the clock signal received back from the memory, and in response to the duty cycle of the clock signal received back from the memory not meeting a target value, adjusts the duty cycle of the clock signal provided to the memory so that the duty cycle of the clock signal received back from the memory better meets the target value. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.


Find Patent Forward Citations

Bhuiyan, Ekram. (2019). Storage system and method for dynamic duty cycle correction (U.S. Patent No. 10437472). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10437472

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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