The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 01, 2019

Filed:

Apr. 02, 2015
Applicant:

Telefonaktiebolaget Lm Ericsson (Publ), Stockholm, SE;

Inventors:

Ulf Gustavsson, Göteborg, SE;

Sven Jacobsson, Göteborg, SE;

Giuseppe Durisi, Göteborg, SE;

Vimar Björk, Göteborg, SE;

Mikael Coldrey, Borås, SE;

Lars Sundström, Södra Sandby, SE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 7/08 (2006.01); H04B 7/0417 (2017.01); H04L 27/26 (2006.01); H04B 1/06 (2006.01); H04B 1/16 (2006.01); H04B 1/30 (2006.01);
U.S. Cl.
CPC ...
H04B 7/0885 (2013.01); H04B 7/0417 (2013.01); H04L 27/2649 (2013.01); H04B 1/06 (2013.01); H04B 1/16 (2013.01); H04B 2001/305 (2013.01);
Abstract

The present disclosure relates to a wireless communication node comprising at least one array antenna configured to receive a radio signal, said array antenna comprising a plurality of receiving antenna devices, each of said antenna devices being connected to a respective receiving circuit which is configured for processing said radio signal. Each receiving circuit comprises a demodulator, an analog-to-digital converter and a decoder, the demodulator being configured to receive an analog signal from the corresponding receiving antenna device and to output a demodulated analog signal to said analog-to-digital converter which outputs a converted digital signal to the decoder. Furthermore, the node is configured for adding a direct current, DC, offset value to said demodulated analog signal wherein the combined offset values of said node follow a predetermined distribution of values, having a variance, over the analog-to-digital converters.


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