The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 01, 2019

Filed:

Jan. 23, 2018
Applicant:

Mediatek Inc., Hsinchu, TW;

Inventors:

Wei-Jen Chen, Hsinchu, TW;

Ju-Ya Chen, Hsinchu, TW;

Yen-Shuo Chang, Hsinchu, TW;

Timothy Perrin Fisher-Jeffes, San Jose, CA (US);

Mao-Ching Chiu, Hsinchu, TW;

Cheng-Yi Hsu, Hsinchu, TW;

Chong-You Lee, Hsinchu, TW;

Assignee:

MEDIATEK INC., Hsinchu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01); H03M 13/27 (2006.01); H03M 13/29 (2006.01); H03M 13/11 (2006.01);
U.S. Cl.
CPC ...
H03M 13/27 (2013.01); H03M 13/1102 (2013.01); H03M 13/116 (2013.01); H03M 13/2906 (2013.01); H03M 13/6362 (2013.01); H03M 13/6393 (2013.01);
Abstract

Concepts and schemes pertaining to location of interleaver with low-density parity-check (LDPC) code are described. A processor of an apparatus encodes data to provide a stream of encoded data. The processor also rate matches the encoded data to provide a rate-matched stream of encoded data. The processor further interleaving the rate-matched stream of encoded data. In rate matching the encoded data, the processor buffers the stream of encoded data in a circular buffer, with the circular buffer functioning as a rate matching block that rate matches the stream of encoded data. In interleaving the rate-matched stream of encoded data, the processor performs bit-level interleaving on the rate-matched stream of encoded data to provide a stream of interleaved data.


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