The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 01, 2019

Filed:

Jan. 05, 2018
Applicant:

Joled Inc., Tokyo, JP;

Inventors:

Hiroshi Hayashi, Tokyo, JP;

Tokuaki Kuniyoshi, Tokyo, JP;

Yasuhiro Terai, Tokyo, JP;

Eri Matsuo, Tokyo, JP;

Toshiaki Yoshitani, Tokyo, JP;

Naoki Asano, Tokyo, JP;

Assignee:

JOLED INC., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 29/786 (2006.01); H01L 21/027 (2006.01); H01L 21/768 (2006.01); H01L 29/66 (2006.01); H01L 29/417 (2006.01);
U.S. Cl.
CPC ...
H01L 27/124 (2013.01); H01L 21/0273 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 21/76897 (2013.01); H01L 27/1225 (2013.01); H01L 27/1248 (2013.01); H01L 27/1255 (2013.01); H01L 27/1262 (2013.01); H01L 27/1288 (2013.01); H01L 29/41733 (2013.01); H01L 29/66969 (2013.01); H01L 29/786 (2013.01); H01L 29/7869 (2013.01);
Abstract

A semiconductor device includes a substrate, a first wiring line, a semiconductor film, a second wiring line, and an insulating film. The substrate includes first, second, and third regions provided adjacently in this order in a predetermined direction. The first wiring line is provided on the substrate and provided in each of the first, second, and third regions. The semiconductor film has a low-resistance region in at least a portion thereof. The semiconductor film is provided between the first wiring line and the substrate in the first region, and is in contact with the first wiring line in the second region. The second wiring line is provided at a position closer to the substrate than the semiconductor film, and is in contact with the first wiring line in the third region. The insulating film is provided between the first wiring line and the semiconductor film in the first region.


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