The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 01, 2019

Filed:

Dec. 19, 2017
Applicant:

Nxp B.v., Eindhoven, NL;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/00 (2006.01); H01L 21/66 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 23/538 (2006.01); H01L 25/18 (2006.01); H04B 1/40 (2015.01); H01L 23/367 (2006.01); H01L 23/427 (2006.01); H04B 1/04 (2006.01); H04B 1/16 (2006.01);
U.S. Cl.
CPC ...
H01L 25/50 (2013.01); H01L 21/563 (2013.01); H01L 21/568 (2013.01); H01L 21/6835 (2013.01); H01L 22/22 (2013.01); H01L 22/32 (2013.01); H01L 23/3185 (2013.01); H01L 23/5386 (2013.01); H01L 24/16 (2013.01); H01L 25/18 (2013.01); H01L 23/3675 (2013.01); H01L 23/427 (2013.01); H01L 2221/68368 (2013.01); H01L 2221/68381 (2013.01); H01L 2224/16227 (2013.01); H04B 1/04 (2013.01); H04B 1/16 (2013.01); H04B 1/40 (2013.01);
Abstract

Embodiments are provided that include a method for fabricating a multi-die package including: placing a plurality of flip chip dies and splitter dies on the sacrificial carrier; performing solder reflow to join solder bumps of each flip chip die and each splitter die to the sacrificial carrier that includes test probe circuitry; testing the flip chip and splitter dies; replacing any faulty dies; overmolding the flip chip and splitter dies on the sacrificial carrier to form a panel of embedded dies; planarizing the panel of embedded dies to expose back surfaces of the embedded dies; forming a metallization layer across the back surface of the panel of embedded dies; and removing the sacrificial carrier to expose a front surface of the panel of embedded dies, wherein a contact surface of each solder bump of each flip chip die and splitter die is exposed in the front surface.


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