The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 01, 2019
Filed:
Apr. 25, 2016
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Carsten Von Koblinski, Villach, AT;
Markus Ottowitz, Arnoldstein, AT;
Andreas Riegler, Lichtpold, AT;
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/308 (2006.01); H01L 21/304 (2006.01); H01L 21/302 (2006.01); H01L 21/306 (2006.01); H01L 21/3065 (2006.01);
U.S. Cl.
CPC ...
H01L 21/308 (2013.01); H01L 21/302 (2013.01); H01L 21/3065 (2013.01); H01L 21/3083 (2013.01); H01L 21/30604 (2013.01); H01L 21/30625 (2013.01);
Abstract
Various embodiments provide a method of planarizing a semiconductor wafer, wherein the method comprises providing a semiconductor wafer comprising a surface; and forming a mask layer on the surface of the semiconductor wafer, wherein a thickness of the mask layer is smaller in thinning areas, which are to be thinned for planarizing, than in areas which are not to be thinned for planarizing.