The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 01, 2019
Filed:
Jan. 25, 2018
Xilinx, Inc., San Jose, CA (US);
David Van Campenhout, San Jose, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
Disclosed approaches include inputting a block diagram representation of a circuit design to a processor. Respective high-level programming language (HLL) code fragments associated with each block of the block diagram representation are determined. A dependency graph is generated from the block diagram representation. One or more clusters of vertices are generated from the dependency graph. Each of the HLL code fragments represented by the vertices of each cluster includes a for-loop, and each cluster includes a subset of the plurality of vertices and edges. For each of the clusters, a plurality of for-loops of the HLL code fragments associated with blocks represented by the vertices of the cluster are combined into a single for-loop. An HLL function is generated from each single for-loop and the HLL code fragments associated with each block that is not represented by any of the one or more clusters.