The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 01, 2019
Filed:
May. 30, 2014
Oracle International Corporation, Redwood City, CA (US);
James M. Frei, Sunol, CA (US);
Jyotika Singh, San Jose, CA (US);
Connie K. Szeto, Escondido, CA (US);
Ryan Travis Caldwell, San Diego, CA (US);
Kenneth F. Hatch, Sunol, CA (US);
Oracle International Corporation, Redwood City, CA (US);
Abstract
A method for characterization of fixture utilizes a mirror symmetric THRU structure and either a HALF-THRU with a LOAD shunted to ground or a THRU with a LOAD shunted to ground located at the mirror reference plane. The method extracts the short, open, and thru measurements from the THRU structure due to the mirror symmetry. The HALF-THRU with a LOAD or the THRU with a LOAD shunted to ground located at the mirror reference plane provides the independent measurement to fully characterize the fixture. The resultant impedance or scattering parameter HALF-THRU model may be used in de-embedding a Device-Under-Test, a calibration routine, or computational simulations. The parameters of a HALF-THRU model may be stored in a memory storage circuit affixed to the associated HALF-THRU fixture. Some embodiments may include at least one memory storage circuit that attaches to the HALF-THRU fixture body affixed to an interposing matable connector.