The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 24, 2019

Filed:

Aug. 17, 2017
Applicant:

Fabriscale Technologies As, Fornebu, NO;

Inventors:

Jesus Camacho Villanueva, Valencia, ES;

Tor Skeie, Oslo, NO;

Sven-Arne Reinemo, Oslo, NO;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/721 (2013.01); H04L 12/755 (2013.01); H04L 12/44 (2006.01);
U.S. Cl.
CPC ...
H04L 45/14 (2013.01); H04L 45/021 (2013.01); H04L 12/44 (2013.01);
Abstract

A device and method for providing balanced routing paths in a computational grid including determining a type of topology of the computational grid having a plurality of levels, wherein each level includes a plurality of switches, determining whether the type of topology of the computational grid is a fat-tree, determining whether the fat-tree is odd, determining whether the fat-tree is a regular fat-tree, computing a first set of routing paths for the computational grid based on the determining of whether the fat-tree is odd and is a regular fat-tree, computing a second set of routing paths for the computational grid using a topology agnostic routing technique, and configuring forwarding tables in said switches with the first set of computed routing paths when the topology is determined to be a fat-tree and with the second set of computed routing paths when the topology is determined to not be a fat-tree.


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