The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 24, 2019

Filed:

Nov. 10, 2017
Applicant:

Electronics and Telecommunications Research Institute, Daejeon, KR;

Inventors:

Min Hyuk Kim, Daejeon, KR;

Youngmin Choi, Daejeon, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/11 (2006.01); H03M 13/00 (2006.01);
U.S. Cl.
CPC ...
H03M 13/1174 (2013.01); H03M 13/118 (2013.01); H03M 13/1117 (2013.01); H03M 13/1131 (2013.01); H03M 13/1134 (2013.01); H03M 13/1137 (2013.01); H03M 13/1145 (2013.01); H03M 13/6566 (2013.01);
Abstract

Provided is a method of scheduling a parity check matrix, the method performed by a low-density parity-check (LDPC) decoder, the method including checking at least one non-zero elemental variable node in the parity check matrix, identifying a first index of a row of the parity check matrix in the at least one non-zero elemental variable node, extracting a column in which the at least one non-zero elemental variable node is positionable from the parity check matrix using the first index, and mapping the at least one non-zero elemental variable node to the extracted column based on an arrangement, and identifying a second index of the column of the parity check matrix through the mapped at least one non-zero elemental variable node.


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