The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 24, 2019

Filed:

Dec. 22, 2017
Applicants:

Tsinghua University, Beijing, CN;

Hon Hai Precision Industry Co., Ltd., New Taipei, TW;

Inventors:

Mo Chen, Beijing, CN;

Qun-Qing Li, Beijing, CN;

Li-Hui Zhang, Beijing, CN;

Xiao-Yang Xiao, Beijing, CN;

Jin Zhang, Beijing, CN;

Shou-Shan Fan, Beijing, CN;

Assignees:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/027 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01); H01L 29/10 (2006.01); H01L 27/12 (2006.01); H01L 21/02 (2006.01); B82Y 10/00 (2011.01); H01L 51/00 (2006.01); H01L 29/06 (2006.01); H01L 51/05 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0272 (2013.01); B82Y 10/00 (2013.01); H01L 21/0262 (2013.01); H01L 27/127 (2013.01); H01L 27/1225 (2013.01); H01L 29/1033 (2013.01); H01L 29/41733 (2013.01); H01L 29/42384 (2013.01); H01L 29/66742 (2013.01); H01L 29/78603 (2013.01); H01L 51/0011 (2013.01); H01L 51/0048 (2013.01); H01L 29/0673 (2013.01); H01L 51/0558 (2013.01);
Abstract

A method of making a thin film transistor, the method including: providing an insulating layer on a semiconductor substrate, forming a semiconductor layer on the insulating layer; locating a first photoresist layer, a nanowire structure, a second photoresist layer on the semiconductor layer, wherein the nanowire structure comprises a nanowire; forming an opening in the first photoresist layer and the second photoresist layer to form an exposed surface, wherein a part of the nanowire is exposed in the opening; depositing a conductive film layer on the exposed surface of the semiconductor layer, wherein the conductive film layer defines a nano-scaled channel corresponding to the nanowire, and the conductive film layer is divided into two regions by the nano-scaled channel, one region is used as a source electrode, and the other region is used as a drain electrode; forming a gate electrode on the semiconductor substrate.


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