The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 24, 2019

Filed:

May. 08, 2017
Applicant:

Hewlett Packard Enterprise Development Lp, Houston, TX (US);

Inventors:

Jean Tourrilhes, Palo Alto, CA (US);

Michael Schlansker, Palo Alto, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0831 (2016.01); G06F 12/0815 (2016.01); G06F 12/0813 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0835 (2013.01); G06F 12/0813 (2013.01); G06F 12/0815 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/1041 (2013.01); G06F 2212/154 (2013.01); G06F 2212/621 (2013.01);
Abstract

Examples disclosed herein relate to partial cache coherence. In some examples disclosed herein, a node connected to a memory fabric may include local cache connected to a local processor and a memory coherency proxy to. The memory coherency proxy may configure a portion of a fabric memory on the memory fabric as a proxy backing memory and expose the proxy backing memory to other nodes in the memory fabric as a fictitious local memory on the node, and may implement partial coherency for memory requests directed to the fictitious local memory. The fictitious local memory may have a memory address region different from a memory address region of a native local memory on the node.


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