The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 24, 2019

Filed:

Dec. 29, 2017
Applicant:

Apacer Technology Inc., New Taipei, TW;

Inventors:

Jiunn-Chang Lee, New Taipei, TW;

Yin-Chuan Liao, New Taipei, TW;

Assignee:

Apacer Technology Inc., New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G06F 3/06 (2006.01); G11C 16/14 (2006.01); G11C 16/16 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0616 (2013.01); G06F 3/064 (2013.01); G06F 3/0661 (2013.01); G06F 3/0679 (2013.01); G11C 16/14 (2013.01); G11C 16/16 (2013.01); G11C 16/3445 (2013.01);
Abstract

The present disclosure illustrates a method of extending a lifetime of a solid state disk (SSD). The SSD includes a flash memory which is a multi-level cell (MLC) flash memory. The method includes steps of: setting a number of logic blocks of the SSD to be one-half of a number of physical blocks of the flash memory; reading, by a control unit of the SSD, a write/erase times of each of the physical blocks of the flash memory; and converting the physical block, of which a number of the write/erase times exceeds an upper limit of the write/erase times, from a multi-level storage format to a single-level storage format. A number of the logic blocks is a constant value.


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