The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2019

Filed:

Feb. 07, 2017
Applicant:

Mediatek Inc., Hsin-Chu, TW;

Inventors:

Chu-Wei Hu, Zhubei, TW;

Cheng Hua Lin, Hsinchu, TW;

Assignee:

MediaTek Inc., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 21/28 (2006.01); H01L 21/285 (2006.01); H01L 29/40 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7816 (2013.01); H01L 21/28008 (2013.01); H01L 21/28518 (2013.01); H01L 29/402 (2013.01); H01L 29/404 (2013.01); H01L 29/42356 (2013.01); H01L 29/42376 (2013.01); H01L 29/66681 (2013.01); H01L 29/7831 (2013.01); H01L 29/1083 (2013.01);
Abstract

A semiconductor device capable of high-voltage operation includes a semiconductor substrate having a first conductivity type. A first well doped region is formed in the semiconductor substrate, having a second conductivity type that is the opposite of the first conductivity type. A first doped region and a second doped region are formed on the first well doped region, having the second conductivity type. A first gate structure is formed over the first well doped region and adjacent to the first doped region. A second gate structure overlaps the first gate structure and the first well doped region. A third gate structure is formed beside the second gate structure and close to the second doped region. The top surface of the first well doped region between the second gate structure and the third gate structure avoids having any gate structure and silicide formed thereon.


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