The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2019

Filed:

Jun. 21, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Hyun-Jin Shin, Hwaseong-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/12 (2006.01); G11C 16/24 (2006.01); G11C 16/04 (2006.01); G11C 7/04 (2006.01); G11C 16/26 (2006.01); G11C 7/06 (2006.01); G11C 7/08 (2006.01); G11C 5/14 (2006.01); G11C 16/30 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 7/12 (2013.01); G11C 5/145 (2013.01); G11C 7/04 (2013.01); G11C 7/062 (2013.01); G11C 7/067 (2013.01); G11C 7/08 (2013.01); G11C 16/0425 (2013.01); G11C 16/24 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01); G11C 16/3418 (2013.01);
Abstract

A semiconductor memory device includes a memory cell array including a plurality of memory cells connected to a plurality of bit lines, a control signal generating circuit configured to generate a first control signal in response to a first operating temperature of the semiconductor memory device and a second control signal in response to a second operating temperature of the semiconductor memory device, a precharge circuit configured to provide a precharge current to a first bit line of the plurality of bit lines in response to an enable signal, and a boost circuit configured to provide a boost current to the first bit line in response to the enable signal, wherein the magnitude of the boost circuit is responsive to one of the first and second control signals.


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