The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2019

Filed:

Nov. 30, 2015
Applicant:

Arm Finance Overseas Limited, Cambridge, GB;

Inventors:

Karagada R. Kishore, Saratoga, CA (US);

Kevin D. Kissell, Menlo Park, CA (US);

Georgi Z. Beloev, Walnut Creek, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 9/30 (2018.01); G06F 9/32 (2018.01); G06F 12/0875 (2016.01); G06F 13/16 (2006.01); G06F 9/345 (2018.01);
U.S. Cl.
CPC ...
G06F 3/065 (2013.01); G06F 3/0619 (2013.01); G06F 3/0656 (2013.01); G06F 3/0683 (2013.01); G06F 9/3004 (2013.01); G06F 9/30032 (2013.01); G06F 9/30043 (2013.01); G06F 9/325 (2013.01); G06F 9/345 (2013.01); G06F 12/0875 (2013.01); G06F 13/1673 (2013.01); G06F 2212/452 (2013.01);
Abstract

System and method for performing a high-bandwidth memory copy. Memory transfer instructions allow for copying of data from a first memory location to a second memory location without the use of load and store word instructions thereby achieving a high-bandwidth copy. In one embodiment, the method includes the steps of (1) decoding a destination address from a first memory transfer instruction, (2) storing the destination address in a register in the bus interface unit, (3) decoding a source address from a second memory transfer instruction, and (4) copying the contents of a memory location specified by the source memory address to a memory location specified by the contents of the register. Other methods and a microprocessor system are also presented.


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