The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 17, 2019
Filed:
Nov. 17, 2017
Mija Industries, Inc., Rockland, MA (US);
Jorge Rubinstein, Newton, MA (US);
Robert M. Manning, Weymouth, MA (US);
John J. McSheffrey, Hingham, MA (US);
MIJA INDUSTRIES, INC., Rockland, MA (US);
Abstract
A power management system and method including a normally-open switch, an on/off circuit, a microprocessor, and at least one sensor to monitor a condition. The on/off circuit includes an on/off control gate-controlled switch device such as a PMOS device for system power, a flip/flop switch to respectively activate and deactivate the on/off control PMOS device, and a transition detection circuit connected to the normally-open switch. A single DC power source establishes a source voltage to power the on/off circuit and the normally-open switch. The transition detection circuit generates an 'on' signal when the user initially activates the normally-open switch, and supplies the 'on' signal to the flip/flop switch to change it to an “on” state to activate the on/off control PMOS device. While activated, the on/off control PMOS device enables system power from the power source to be provided to at least the sensor and the microprocessor. The microprocessor generates an “off” signal when the normally-open switch is activated for at least a selected period of time, and supplies the “off” signal to the flip/flop switch to change it to an “off” state to deactivate the on/off control PMOS device and thereby disable system power to at least the sensor and the microprocessor.